Building Smarter Knowledge Graph Pipeline for Secure and Robust Semiconductor Chips

Session Track: App Dev

Session Time: 08:30 pm - 09:00 pm November 6

Session description

Semiconductor chips are increasingly vulnerable to attacks, exploits, and cyber threats. These chips are highly complex, often comprising hundreds of billions of components. Their transnational supply chains provide many opportunities for malfeasant intrusions, from surreptitious changes to the behavioral model to physical modification of the device (on the die, in test, or during packaging). Ensuring chip security early in the design process is critical. In this session, we will present a scalable, graph-driven system that transforms chip design metadata into a dynamic, queryable knowledge graph. This enables proactive detection and traceable analysis of potential security risks. We will demonstrate how we: • Modeled chip metadata as a comprehensive knowledge graph. • Designed and implemented a scalable GraphRAG (Graph Retrieval-Augmented Generation) system that extracts entities and relationships from unstructured data, builds a dynamic knowledge graph, and uses it to identify design vulnerabilities while enabling LLM-based cyber-hardening. • Leveraged graph metrics to prioritize high-risk areas for targeted mitigation. Our approach provides a novel solution for faster, more insightful, and scalable security analysis in semiconductor design. This session is ideal for engineers, researchers, and tool developers looking to explore innovative applications of GraphRAG to address tomorrow’s complex cybersecurity challenges.